This invention relates to wide-band amplifiers in general and to gain cell amplifier circuits in particular. The use of the gain cell, shown in FIG. 1, to improve signal bandwidth is known to the prior art. Refer, for example, to the article entitled "A New Wide-Band Amplifier Technique" by Barrie Gilbert, published in the IEEE Journal of Solid-State Circuits Vol. SC-3, No. 4, December 1968. In FIG. 1, I.sub.in and I.sub.in represent differential input currents, I.sub.OUT and I.sub.OUT represent differential output currents, I.sub.E represents circuit bias current, and V.sub.REF represents circuit bias voltage.
However, to achieve improvements in signal bandwidth by compensation (i.e., by introducing a zero to cancel the dominant pole as described, for example, in the pole-zero cancellation method of E. M. Cherry and D. E. Hooper in Amplifying Devices and Low Pass Amplifier Design, J. Wiley and Sons Inc., New York, 1968, FIG. 13.1(e) page 635), it is common practice to add emitter resistors and shunt capacitors (external capacitance) to the inner pair of transistors Q2 and Q3 in such a way, as shown in FIG. 2, as to satisfy the relationship EQU R.sub.E C.sub.E = 1/f.sub.T ( 1)
where R.sub.E represents the values of the resistors connected to the inner pair of transistors Q2 and Q3, C.sub.E represents the external capacitance of the circuit, i.e., the capacitance of the shunt capacitors across R.sub.E, and f.sub.T represents transistor gain bandwidth product.
Because this method of compensation utilizing shunt capacitors is dependent on C.sub.E and f.sub.T, in addition to R.sub.E, inexact compensation and, hence, limited bandwidth improvements results whenever there are large variations in C.sub.E or in f.sub.T. To provide significant improvement in signal bandwidth, therefore, a gain cell circuit is needed capable of providing compensation independent of the external capacitance (C.sub.E) of the circuit or the gain bandwidth product (f.sub.T). A further problem with the method of using shunt capacitors in prior art monolithic integrated circuits is the difficulty in fabricating capacitors to suitable tolerances and the difficulty in minimizing parasitic capacitance.